Modern devices such as smartphones and tablets demand stringent clock performance standards for their various sub-systems such as digital cores, data converters, and frequency synthesizers. For example, clock performance for digital cores must satisfy low period jitter and low duty-cycle error. Similarly, data converters require clock signals with low absolute jitter (time internal error (TIE)). In addition, frequency synthesizers require clock signals with low phase noise and reduced fractional spurs. Emerging self-driving automotive applications also demand stringent clock performance.
To ensure that such demanding clock performance standards are maintained, it is conventional for modern devices to incorporate on-chip clock screening for automatic or on-the-fly monitoring purposes. But conventional clock screening techniques are not able to address all of the various clock measurement modes such as period jitter, K-cycle jitter, TIE jitter, duty-cycle variation, clock skew, and so on. One problem that has thwarted conventional approaches to offer a unified clock performance circuit is that such a generic clock performance screening simultaneously requires high resolution, wide input frequency range, and high robustness. To attempt to meet such divergent requirements, existing designs typically employ delay cells to implement a time-to-digital (TDC) converter for clock jitter and clock skew measurement. But satisfying high resolution and wide input frequency range requires numerous delay cells using conventional flash TDC or Vernier TDC architectures, which consumes substantial chip area and increases power consumption. Moreover, such a plurality of delay cells is prone to process variations so as to lower testing robustness and produce false clock screening results.
There is thus a need in the art for a clock screening circuit that includes a time-to-digital converter that is insensitive to process variations and also includes a clock interface that supports multiple modes for screening various clock performance metrics.